news

May 15, 2026 Our paper, “APT: Architecture Performance across Topologies,” has been accepted to the YArch’26 (in conjunction with ISCA’26)!
Sep 09, 2025 Our patent, “Code generation method, error correction code generation apparatus, and storage medium storing instructions to perform code generation method,” has been granted by the U.S. Patent and Trademark Office (USPTO)!
Aug 25, 2025 I begin my Ph.D. program in Electrical and Computer Engineering (ECE) at UT Austin!
Apr 13, 2025 New website is up!
Mar 28, 2025 I have been selected for the UT Austin Engineering Fellowship!
Mar 20, 2025 I have been admitted to the Ph.D. program in Electrical and Computer Engineering (ECE) at UT Austin!